Multichannel Buffered Serial Port (McBSP) Module
The McBSP module has the following features:
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Compatible to McBSP in TMS320C54x™/ TMS320C55x™ DSP devices
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Full-duplex communication
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Double-buffered data registers that allow a continuous data stream
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Independent framing and clocking for receive and transmit
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External shift clock generation or an internal programmable frequency shift clock
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A wide selection of data sizes including 8-, 12-, 16-, 20-, 24-, or 32-bits
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8-bit data transfers with LSB or MSB first
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Programmable polarity for both frame synchronization and data clocks
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Highly programmable internal clock and frame generation
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Direct interface to industry-standard CODECs, Analog Interface Chips (AICs), and other serially
connected analog-to-digital (A/D) and digital-to-analog (D/A) devices
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Works with SPI-compatible devices
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The following application interfaces can be supported on the McBSP:
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T1/E1 framers
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IOM-2 compliant devices
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AC97-compliant devices (the necessary multiphase frame synchronization capability is provided.)
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IIS-compliant devices
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SPI
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McBSP clock rate,
where CLKSRG source could be LSPCLK, CLKX, or CLKR. Serial port performance is limited by I/O
buffer switching speed. Internal prescalers must be adjusted such that the peripheral speed is less
than the I/O buffer speed limit
