♦ Memory configuration ♦ Three interrupt sources

Memory configuration  Two 8-bit timer. (T0, TC0).

ROM size: 2K * 16 bits. T0: Basic timer.

RAM size: 128 * 8 bits. TC0: Auto-reload timer/Counter/PWM/TC0OUT output.

 One channel 8-bit PWM output.

 8 levels stack buffer.  One channel 2KHz/4KHz buzzer output.

 On chip watchdog timer and clock source is internal

 Four interrupt sources low clock RC type (16KHz @3V, 32KHz @5V).

Three internal interrupts: T0, TC0, ADC.  5 channel 12-bit ADC.

One external interrupts: INT0

 Four system clocks

 I/O pin configuration External high clock: RC type up to 4 MHz

Bi-directional: P0, P4, P5 External high clock: Crystal type up to 4 MHz

Wakeup: P0 level change Internal high clock: RC type 16MHz.

Pull-up resisters: P0, P4, P5 Internal low clock: RC type 16KHz(3V), 32KHz(5V).

External interrupt: P0.0

ADC input pin: AIN0~AIN4  Four operating modes

Normal mode: Both high and low clock active

 Fcpu (Instruction cycle) Slow mode: Low clock only

Fcpu = Fosc/4, Fosc/8, Fosc/16. Sleep mode: Both high and low clock stop

Green mode: Periodical wakeup by timer

 Powerful instructions

Instruction’s length is one word.  Package (Chip form support)

Most of instructions are one cycle only. P-DIP 20 pin

All ROM area JMP instruction. SOP 20 pin

All ROM area lookup table function (MOVC) SSOP 20 pin 

OTP ROM size: 1K * 16 bits. One internal interrupts: T0, TC0.

RAM size: 48 * 8 bits. One external interrupts: INT0.

Four levels stack buffer

♦ Two 8-bit Timer/Counter

♦ I/O pin configuration T0: Basic Timer with 0.5sec RTC.

Bi-directional: P0, P1, P2, P5. TC0: Auto-reload timer/Counter/Buzzer output

Input only: P1.1.

Programmable open-drain: P1.0. ♦ On chip watchdog timer and clock source is internal

Wakeup: P0, P1 level change trigger low clock RC type (16KHz @3V, 32KHz @5V).

Pull-up resisters: P0, P1, P2, P5.

External Interrupt trigger edge: ♦ Dual system clocks

P0.0 controlled by PEDGE register. External high clock: RC type up to 10 MHz

External high clock: Crystal type up to 16 MHz

♦ 3-Level LVD. Internal high clock: 16MHz RC type. Fcpu is limited to

Fosc/4~Fosc/16.

Reset system and power monitor. Internal low clock: RC type 16KHz(3V), 32KHz(5V)

♦ Powerful instructions ♦ Operating modes

One clocks per instruction cycle (1T) Normal mode: Both high and low clock active

Most of instructions are one cycle only. Slow mode: Low clock only

All ROM area JMP instruction. Sleep mode: Both high and low clock stop

All ROM area CALL address instruction. Green mode: Periodical wakeup by T0 Timer

All ROM area lookup table function (MOVC)

♦ Package (Chip form support)

PDIP 14 pins

SOP 14 pins

SSOP 16 pins