General Description :
The IP1826Ais a non-blocking, store-and-forward architecture switch controller, which supports 24-port SS-SMII, and 2-port RGMII to constitutes a 26-port switch application. The 128-pin PQFP package makes it a very cost-effective solution for a 26-port switch.
Note: In the following paragraph, 24-port SS-SMII is referred to as port 0 ~ port 23 (or p0 ~ p23 for abbreviation). Gigabit port 1 and Gigabit port 2 is named as port 24(p24) and port 25(p25) respectively
The IP1826Aembeds a 2.75Mb SSRAM for the use of packet buffer and 4K MAC address table and also provides a 2-wire CPU interface, which allows designers to access to the internal registers of IP1826Aand the external PHY’s. The LED information is provided through a 2-wire LED interface by IP1826A. With external logic devices, it can provide the status of link, speed, duplex and activity. The IP1826Asupports flow control, broadcast storm filtering, QoS (Quality of Service), port based VLAN, tag based VLAN, bi-direction per-port basis bandwidth control, port trunking, port mirroring and port security.
With the console management function, the designer can configure and monitor IP1826Aswitch through hyper-terminal program built in Microsoft Windows without installing extra program.
Feature :
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Provide 24 SS-SMII, 2-port RGMII and 2-wire CPU interface
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Built in 2.75Mb RAM
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Support packet length up to 1536 Bytes
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Store & forward, share memory, non-blocking architecture
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Only one 25MHz crystal is needed
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Adjustable IO voltage (3.3/1.9V SS-SMII)
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Built in 2.5V and 1.9V regulator
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128 pin PQFP lead-free package
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Programmable MAC address table through CPU interface |