特点
•符合JEDEC标准。 8-1A
•ESD保护：HBM EIA/JESD22-A114-A超过2000 VMM EIA/JESD22-A115-A超过200 V
• - 40至+85°C - 40至+125°C。
说明
74HC/HCT04是高速Si-gate CMOS设备，是引脚兼容的低功率肖特基TTL

（输入通道）。他们中符合JEDEC标准没有。 7A。 74HC/HCT04提

供六反转的缓冲器。

Notes
1.   CPD is used to determine the dynamic power dissipation (PD in m W).
PD = CPD ·  VCC
2 ·  fi ·  N + S (CL ·  VCC
2 ·  fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volts;
N = total load switching outputs;
S (CL ·  VCC
2 ·  fo) = sum of the outputs.
2.   For 74HC04: the condition is VI = GND to VCC.
For 74HCT04: the condition is VI = GND to VCC -  1.5 V.
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