描述: FM8P756A : 24-pin OTP device FM8P756D : 28-pin OTP device with VR pin FM8P756B : 20-pin OTP device FM8P756E : 24-pin OTP device with VR pin FM8P756C : 16-pin OTP device FM8P756F : 18-pin OTP device with VR pin FM8P756G : 20-pin OTP device with VR pin Total 8 channel 10bit AD converter with ±2LSB resolution All instructions are single cycle except for program branches which are two-cycles All OTP area GOTO instruction All OTP area subroutine CALL instruction 8-bit wide data path 8-level deep hardware stack 2K x 16 bits on chip OTP 36x8 bits on chip special purpose registers and 96 x 8 bits on chip general purpose registers (SRAM) Operating speed: DC-20 MHz clock input, or DC-100 ns instruction cycle Direct, indirect addressing modes for data accessing Three real time down-count Timer/Counter with 3-bit programmable prescaler - TMR1: 8-bit, PWM1 & Timer - TMR2: 8-bit, PWM2 & Timer - TMR3: 8-bit, Timer Software controlled 4-COM lines LCD driver with 1/2bias Built-in 3 levels Low Voltage Detector (LVDT) (2.2V/2.6V/3.7V) for Brown-out Reset (BOR) Power-up Reset Timer (PWRT) On chip Watchdog Timer (WDT) with internal oscillator for reli able operation and soft-ware watch-dog enable/disable control Three I/O ports Port A, Port B and Port C with independent direction control - 21 Bi-direction I/O port (Programmable Pull-up enable in Input mode) - One Input only port (IOA7/RSTB) Four kinds of interrupt source: 3 Timers/Counters, 8 external interrupt sources: IOA0~IOA7, Internal watchdog timer (i_WDT) wakeup, and A/D end of conversion Wake-up from SLEEP: - Port A (IOA0~IOA7) pin change wakeup - WDT overflow - i_WDT overflow Power saving SLEEP mode Programmable Code Protection Selectable oscillator options: - ERC: External Resistor/ Voltage Controlled Oscillator - XT: Cr ystal/Resonator Oscill ator - LF: Low Frequency Crystal Oscil lator - HIRC: Internal Resistor/Capacitor High speed Oscillator - LIRC: Internal Resistor/Capacitor Low speed Oscillator Operating voltage range: - ≤4MHz: 2.2V to 5.5V - ≤8MHz: 2.4V to 5.5V, see 6.1 for more information.