总线协议分析仪
西安安泰测试设备有限公司
中国 西安
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品牌/型号
DDC/1553B
总线协议分析仪 >> DDC 1553B总线 协议分析仿真卡BU-65570i, BU-65572i 特征:PCI Format, One or Two 1553 Buses•
Variable Amplitude Transceivers•
64K Words of Shared RAM per Bus•
Simultaneous Emulation of BC, 31RT’s, and an MT for Each Bus•
IRIG-B Interface•
DMA Data Transfers via PCI MasterOperation•
Software Configuration of BusCoupling and Termination•
PCI Plug and Play Compatible•
32-Bit Time Tag with 1µsec resolution•
Replay of previously recorded BusTraffic via Menu and Runtime Library•
Supports Windows® 95/98/2000,Windows NT® 性能描述:DDC's BU-65570i/72i is a versatile PCI Card designed for the testand simulation of MIL-STD-1553 systems. It provides full, intelligentinterfacing for one or two serial dual redundant MIL-STD-1553 databuses from a PCI chassis. IRIG-B (Inter-Range InstrumentationGroup) is a Parallel time code defined by IRIG Standard 200-95.Support is provided for IRIG receiving 1kHz Pulse Code Modulatedinput in both the BU-65570i and BU-65572i as a standard feature.The BU-65570i is a fixed voltage output 1553 card, and theBU-65572i is a variable voltage output 1553 card. The BU-65572i utilizes a variable voltage output transceiver for eachof the two buses. The output of these transceivers is controlled bysoftware with a minimum of 0 V and a maximum of 21.5 V peak-to-peak over a total of 1024 steps. One of the features designed into the BU-65570i/72i is PCI MasterMode. The master mode provides the capability to transfer blocks ofdata to the host via Direct Memory Access in Monitor mode. DMAtransfers will reduce the host processor overhead when monitor datais being transferred from the card to host memory. The BU-65570i/72i cards provide software controllable bus connec-tion and configuration (transformer or direct) as well as software con-figuration for bus termination. The bus termination is programmableto one of three values: None, Full load (37.5 ohms), and Half load(75.0 ohms). 'C', Visual Basic®, and LabVIEW™ programming libraries are sup-plied with the card. These libraries provide complete control of theboard’s capabilities.
Variable Amplitude Transceivers•
64K Words of Shared RAM per Bus•
Simultaneous Emulation of BC, 31RT’s, and an MT for Each Bus•
IRIG-B Interface•
DMA Data Transfers via PCI MasterOperation•
Software Configuration of BusCoupling and Termination•
PCI Plug and Play Compatible•
32-Bit Time Tag with 1µsec resolution•
Replay of previously recorded BusTraffic via Menu and Runtime Library•
Supports Windows® 95/98/2000,Windows NT® 性能描述:DDC's BU-65570i/72i is a versatile PCI Card designed for the testand simulation of MIL-STD-1553 systems. It provides full, intelligentinterfacing for one or two serial dual redundant MIL-STD-1553 databuses from a PCI chassis. IRIG-B (Inter-Range InstrumentationGroup) is a Parallel time code defined by IRIG Standard 200-95.Support is provided for IRIG receiving 1kHz Pulse Code Modulatedinput in both the BU-65570i and BU-65572i as a standard feature.The BU-65570i is a fixed voltage output 1553 card, and theBU-65572i is a variable voltage output 1553 card. The BU-65572i utilizes a variable voltage output transceiver for eachof the two buses. The output of these transceivers is controlled bysoftware with a minimum of 0 V and a maximum of 21.5 V peak-to-peak over a total of 1024 steps. One of the features designed into the BU-65570i/72i is PCI MasterMode. The master mode provides the capability to transfer blocks ofdata to the host via Direct Memory Access in Monitor mode. DMAtransfers will reduce the host processor overhead when monitor datais being transferred from the card to host memory. The BU-65570i/72i cards provide software controllable bus connec-tion and configuration (transformer or direct) as well as software con-figuration for bus termination. The bus termination is programmableto one of three values: None, Full load (37.5 ohms), and Half load(75.0 ohms). 'C', Visual Basic®, and LabVIEW™ programming libraries are sup-plied with the card. These libraries provide complete control of theboard’s capabilities.
